High quality contributions in the following areas are solicited:
- Advanced SOI materials and structures, innovative SOI-like devices.
- Alternative transistor architectures (FDSOI, Nanowire, Nanosheet, FinFET, MuGFET, vertical MOSFET, FeFET and TFET, MEMS/NEMS, Beyond-CMOS).
- New channel materials for CMOS (strained Si/Ge, III-V, carbon nanotubes; graphene and other 2D materials).
- Properties of ultra-thin semiconductor films and buried oxides, defects, interface quality; thin gate dielectrics: high-κ and ferroelectric materials for switches and memory.
- New functionalities and innovative devices in the More than Moore domain: nanoelectronic sensors, biosensor devices, memrisors, neuromorphic computing devices, quantum computing devices, energy harvesting devices, RF devices, imagers, integrated photonics (on SOI), etc.
- Transport phenomena, compact modeling, device simulation, front- and back-end process simulation.
- CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration.
- Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.
- Memory devices, memristors, hardware for unconventional computing such as neuromorphic, in-memory, in-sensor and quantum computing.
- Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.
Original 2-page abstracts with illustrations will be reviewed by the Scientific Committee. The accepted contributions will be published as 4-page letters in a special issue of the Elsevier journal Solid-State Electronics.